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hf01b00/01/02/03/04 off line high voltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 1 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. the future of analog ic technology description the hf01b00/01/02/03/04 is a flyback regulator with green mode operation. its high efficiency feature over the entire input/load range meets the stringent world-wide energy-saving requirements. the hf01b00/01/02/03/04 is an integrated current mode controller with a 700v fet. its valley switching detector ensures minimum drain-source voltage switching every cycle, per quasi-resonant operation. when the output power falls below a given level, the regulator enters the burst mode to lower the stand-by power consumption. an internal minimum off time limiter prevents the switching frequency from exceeding 150khz, which is below the cispr-22 emi start limit. internal 2.4ms soft start prevents the excessive inrush current during start up the hf01b00/01/02/03/04 provides various protections, such as thermal shutdown (tsd), v cc under voltage lockout (uvlo), over load protection (olp), over voltage protection (ovp) and so on. the hf01b00/01/02/03 is available in pdip8-7 package. and hf01b04 is available in pdip8-7 and soic7. maximum output power 4 230vac 15% 3 85vac~265vac p/n adapter 1 open frame 2 adapter 1 open frame 2 hf01b00dp 35w 54w 23w 30w hf01b01dp 29w 45w 18w 23w HF01B02dp 24w 33w 14w 17w hf01b03dp 22w 30w 11w 13w hf01b04dp 19w 23w 8w 11w hf01b04ds 19w 23w 8w 11w notes: 1. maximum continuous power in a non-ventilated enclosed adapter measured at 50 ambient temperature. 2. maximum continuous power in an open frame design at 50 ambient temperature. 3. 230vac or 110/115vac with doubler. 4. the junction temperature can limit the maximum output power. features ? internal integrated 700v mosfet ? high level of integration, requires very few external components ? universal input voltage (85~265vac) ? quasi-resonant operation over the entire input and load range ? maximum switching frequency limited ? valley switching for high efficiency and better emi performance ? active burst mode for low standby power consumption ? internal high-voltage current source for start-up ? internal soft start ? internal 320ns leading edge blanking ? thermal shutdown (auto restart with hysteresis) ? v cc under voltage lockout with hysteresis (uvlo) ? over voltage protection ? over load protection. ? no load consumption at 265vac hf01b00<100mw hf01b01<80mw HF01B02/03<50mw hf01b04<30mw applications ? battery charger for consumer and home equipment. ? standby power supply. ? small power smps for white goods and consumer electronics. ? low/medium power ac/dc adapter. for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks o f monolithic power systems, inc. free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 2 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical application rtn input 85-265vac * * * t1 output vsd 1 2 4 5 6 7 8 s d s gnd fb vcc hf01b00/01/02/03/04 figure 1?typical application free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 3 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. ordering information part number package top marking free air temperature (t a ) hf01b00dp* hf01b00 hf01b01dp hf01b01 HF01B02dp HF01B02 hf01b03dp hf01b03 hf01b04dp pdip8-7 hf01b04 -40 c to +85 c hf01b04ds** soic7 hf01b04 -40 c to +85 c *for rohs, compliant packaging, add suffix ?lf (e.g. hf01b00dp?lf). ** for tape & reel, add suffix ?z (e.g. hf01b04ds?z); for rohs, compliant packaging, add suffix ?lf (e.g. hf01b04ds?lf?z). package reference 8 7 6 5 1 2 4 top view vcc d s gnd fb vsd s pdip8-7 & soic7 absolute maxi mum ratings (1) drain to source ............................ -0.7v to 700v continuous drain switch current (2) --hf01b00dp, t a =25 c ........................... 1.94a --hf01b01dp, t a =25 c ........................... 1.47a --HF01B02dp, t a =25 c .......................... 1.14a --hf01b03dp, t a =25 c .......................... 0.96a --hf01b04dp, t a =25 c .......................... 0.81a --hf01b04ds, t a =25 c .......................... 0.88a v cc to gnd .....................................-0.3v to 22v vsd, fb, s to gnd...........................-0.3v to 7v junction temperature ...............................150 c thermal shut down ..................................150 c thermal shut down hysteresis ..................40 c lead temperature ....................................260 c storage temperature .............. -60c to +150 c esd capability human body model (all pins except d) ................................................. 2.0kv esd capability machine model ................. 200v recommended operation conditions (3) v cc to gnd .........................................8v to 20v maximum junction temp. (t j ) ............... +125 c thermal resistance (4) ja jc pdip8-7 .................................105 ..... 45 ... c/w soic7 .....................................96 ...... 45 ... c/w notes: 1) exceeding these ratings may damage the device. 2) continuous drain switch current when inductor load is assumed: limited by maximum duty and maximum junction temperature. and the data get from the following conditions: d=50% fs=100khz ipeak 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb. free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 4 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. electrical characteristics v cc =12v, t a =+25 , unless otherwise noted parameter symbol conditions min typ max unit start-up current source (pin d) supply current from pin d i charge v cc =6v; v d =400v 1.4 2 2.6 ma leakage current from pin d i leak v cc =13v; v d =400v 20 a break down voltage v (br)dss 700 -- v hf01b00 1.9 hf01b01 3.3 HF01B02 5.5 hf01b03 7.7 on-state resistance hf01b04 r ds(on) v cc =10v; i d =100ma 11 ? supply voltage management (pin vcc) v cc upper level at which the internal high voltage current source stops v cch 10.6 11.8 13 v v cc lower level at which the internal high voltage current source triggers v ccl 7.2 8 8.8 v v cc decreasing level at which the latchoff phase ends vcc latch 5.5 v internal ic consumption, latchoff phase i latch v cc =6.0v 400 a feedback management (pin fb) internal pull up resistor r fb 10 k ? internal pull up voltage vup 4.5 v pin8 to current set point division ratio i div 3.3 internal soft-start time tss 2.4 ms fb decreasing level at which the regulator enter the burst mode v burl 0.5 v fb increasing level at which the regulator leave the burst mode v burh 0.7 v over load set point v olp 3.7 v valley switching detector (pin vsd) valley point detection threshold voltage v vsd 30 45 60 mv valley point detection hysteresis v hys 10 mv v vsdh high state ipin=3.0ma 7 7.8 8.6 v pin vsd clamp voltage v vsdl low state ipin=-2.0ma -0.8 -0.65 -0.5 v valley point detection delay t vsd pull down from 2v to -100mv 90 150 210 ns parasitical capacitance at pin vsd cpar 10 pf minimum off time t min 6.6 7.8 9 s re-start time after last valley point detection transition t restart 4.6 s ovp sampling delay t ovps 3.5 s pin vsd ovp reference level v ovp 6 v internal impedance rint 24 k ? current sampling management (pin s) leading edge blanking t leb 320 ns maximum current set-point v cs 1 v free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 5 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pin functions pin # name description 1 vsd valley switching detector of the auxiliary flyba ck signal. it ensures discontinuous conduction mode (dcm) operation with valley switching over the entire input/load range. this pin also offers ovp detection. 2 v cc supply voltage pin. typically connect a 22 f bulk capacitor and a 0.1uf ceramic capacitor to this pin. when v cc is charged to 12v, the internal high voltage current source turns off and the ic starts switching; when it falls back to 8v, the high voltage current source turns on again and the ic stops switching. 3 n/c not connected. this pin ensures adequate creepage distance. 4 d drain of the internal mosfet. input for the start up high voltage current source. 5 s source of the internal mosfet. input of the primary current sense signal. 6 s source of the internal mosfet. input of the primary current sense signal. 7 gnd the ic ground. 8 fb this pin sets the primary peak current limit, by directly connecting an optocoupler to this pin to close the feedback loop. a feedback voltage of 3.7v on this pin will trigger an over load protection while 0.5v will trigger a burst m ode operation. the regulator leaves burst mode operation and enters normal operation when the fb voltage reaches 0.7v free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 6 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics 1 1.5 2 2.5 3 -40 -20 0 25 50 85 105 125 vcc upper level vs. temperature 11 11.2 11.4 11.6 11.8 12 -20 -40 0 25 50 85 105 125 v cch (v) vcc lower level vs. temperature 7.5 7.7 7.9 8.1 8.3 8.5 -40 -20 0 25 50 85 105 125 v ccl (v) fb internal pull up resistor vs. temperature 8 9 10 11 12 -40 -20 0 25 50 85 105 125 over load set point vs. temperature 3.4 3.6 3.8 4 -40 -20 0 25 50 85 105 125 v olp (v) valley switching threshold voltage vs. temperature 30 40 50 60 70 80 -40 -20 0 25 50 85 105 125 v vsd (mv) v vsd (mv) minimum off time vs. temperature 7 7.5 8 8.5 9 -40 -20 0 25 50 85 105 125 ovp sampling delay vs. temperature 3 4 -40 -20 0 25 50 85 105 125 pin vsd ovp reference level vs. temperature 5.8 5.9 6 6.1 6.2 -40 -20 0 25 50 85 105 125 free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 7 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics ( continued ) vsd internal impedance level vs. temperature 20 22 24 26 28 30 -40 -20 0 25 50 85 105 125 temperature ( o c) fb decreasing level vs. temperature 400 450 500 550 600 -20 -40 0 25 50 85 105 125 v burh (mv) temperature ( o c) fb increasing level vs. temperature 600 650 700 750 800 -40 -20 0 25 50 85 105 125 v burh (mv) temperature ( o c) temperature ( o c) temperature ( o c) temperature ( o c) hf01b00 nomalized r on vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 -50 -25 0 25 50 75 100 125 150 hf01b00 nomalized r on hf01b01 nomalized r on vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 -50 -25 0 25 50 75 100 125 150 hf01b01 normalized r on HF01B02 nomalized r on vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 -50 -25 0 25 50 75 100 125 150 HF01B02 nomalized r on hf01b03 nomalized r on vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 -50 -25 0 25 50 75 100 125 150 hf01b03 nomalized r on hf01b04 nomalized r on vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 -50 -25 0 25 50 75 100 125 150 hf01b04 nomalized r on temperature ( o c) temperature ( o c) free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 8 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. function block diagram s ( 5 ) s ( 6 ) f b ( 8 ) g n d ( 7 ) v c c ( 2 ) d ( 4 ) v s d ( 1 ) s t a r t u p u n i t v a l l e y d e t e c t o r p r o t e c t i o n u n i t p e a k c u r r e n t l i m i t a t i o n p o w e r m a n a g e m e n t b u r s t m o d e c o n t r o l d r i v i n g s i g n a l m a n a g e m e n t figure 2?block diagram free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 9 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. operation the hf01b00/01/02/03/04 incorporates all the necessary features to build a reliable switch mode power supply. its high level of integration requires very few external components. quasi- resonant operation over entire input/load range results in high efficiency and better emi performance. it also has burst mode operation to minimize the stand-by power consumption at light load. protection features such as latched shutdown or auto-recovery for over-current, over-voltage or over-temperature contribute to a safer converter design without engendering additional circuitry complexity. start-up and v cc uvlo initially, the ic is driven by the internal high voltage current source, which is drawn from the d pin. the ic starts switching and the internal high- voltage current source turns off as soon as the voltage on pin vcc reaches 11.8v. at this point, the supply of the ic is taken over by the auxiliary winding of the transformer, when vcc falls below 8v, the regulator stops switching and the internal high-voltage current source turns on again. 11.8v 8v vcc drain switching pluses regulation occurs here auxiliary winding takes charge high voltage current source on off figure 3?v cc uvlo the lower threshold of vcc uvlo decreases from 8v to 5.5v when fault conditions happen, such as olp, ovp, and otp. soft-start to reduce stress on the primary mosfet and the secondary diode during start-up and to smoothly establish the output voltage, the hf01b00/01/02/03/04 has an internal soft-start circuit that gradually increases the primary current sense threshold, which determines the mosfet peak current during start-up. the pulse width of the power switching device is progressively increased to establish correct operating conditions until the feedback control loop takes charge. figure 4?soft start valley switching detection the hf01b00/01/02/03/04 operates in discontinuous conduction mode (dcm). the valley switching detector ensures minimum drain-source voltage switching, per quasi- resonant operation. valley switching detection is accomplished through monitoring the voltage of the auxiliary winding at the vsd pin. the voltage presents a flyback polarity and the valley switching detection threshold is 45mv. when the voltage on auxiliary winding falls below 45mv, the drain-source voltage of the mosfet become the lowest, which is called ?valley point?, at this point the valley switching detector activates the controller to switch on the mosfet to ensure the minimum drain-source voltage switching, which contributes to better efficiency and emi performance. free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 10 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. figure 5 shows the waveform of valley switching detection on auxiliary winding and the mosfet drain-source voltage. figure 5?valley switching detection an internal minimum off-time limiter prevents the mosfet from turning on until the 7.8us off-time limit is passed.. thus the minimum off time of primary switch will be longer than 7.8us and the switching frequency would be lower than 1/(ton+7.8us). this ensures that the switching frequency is below 150khz, which is below the cisper22 emi minimum limit. figure 6 and 7 shows the minimum turn-off time limit of the primary switch. figure 6?minimum turn-off time limit figure 7?minimum turn-off time limit over-voltage protection (ovp) the positive plateau of the auxiliary winding voltage is proportional to the output voltage. the over voltage protection unit detects the auxiliary winding voltage signal by vsd pin instead of directly monitoring the output voltage. figure 8 shows the external circuit of vsd pin. if the voltage of this pin exceeds 6v, the ovp is triggered, and the hf01b00/01/02/03/04 stops switching and goes into latched fault condition. that means the regulator stays fully latched in this position until the vcc is decreased down to 3v, e.g. when the user unplugs the power supply from the main supply and re-plugs it. vsd r ovp r int hf01b00-04 auxiliary winding 6v ovp figure 8?ovp circuit the internal resistance of vsd pin is 24k , so the ovp triggered point could be programmed through different r ovp selection by the following formula: ( ) ( ) s i n t o v p s o v p o v p a i n t a n 6 r r n 6 2 4 k r v n r n 2 4 k + + == free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 11 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. where, v ovp is the output voltage when ovp happens; n s is the turns of secondary winding of the transformer; n a is the turns of the auxiliary winding. the plateau voltage of the auxiliary winding is sampled at the vsd pin with a 3.5us delay after the turn-off sequence. otherwise, the ringing cause by transformer leakage inductance may unintentional trigger the ovp. 3.5us ovp sample v aux figure 9?ovp sample delay over load protection (olp) in a flyback converter, the maximum output power is limited by the maximum switching frequency and primary peak current. if the load consumes more than the maximum output power, output voltage will drop below the set point. this reduces the current through the optocoupler led by the negative feedback control loop, and thus fb voltage goes up. the voltage at the fb pin is continuously monitored. when the feedback voltage exceeds the v olp threshold?3.7v, the ic stops switching and enters a safe low-power operating mode that prevents from any lethal thermal or stress damage. as soon as the fault disappears, the ic resumes switching. thus the circuit operates in a burst manner, called auto-recovery. during fault condition, the v cc uvlo lower threshold drops down from 8v to 5.5v. during the start-up phase or load transient, the fb voltage stays high enough temporarily to mis-trigger the olp, to prevent this undesired protection, olp circuit is designed to be triggered after vcc is decreased below 8.5v. burst operation to minimize stand-by power consumption, the hf01b00/01/02/03/04 implement burst mode at no load or light load. as the load decreases, the fb voltage decreases. the ic stops switching when the fb voltage drops below the lower threshold v brul ?0.5v. then the output voltage starts to drop at a rate dependent on the load. this causes the fb voltage to rise again due to the negative feedback control loop. once the fb voltage exceeds the upper threshold v bruh ?0.7v, switching pulse resumes. the fb voltage then decreases and the whole process repeats. burst- mode operation alternately enables and disables the switching pulse of the mosfet. hence switching loss at no load or light load conditions is greatly reduced. figure 10 shows the burst mode operation of hf01b00/01/02/03/04 figure 10?burst mode operation thermal shutdown (tsd) to prevents from any lethal thermal damage, the hf01b00/01/02/03/04 shuts down switching cycle when the junction temperature exceeds 150 . as soon as the junction temperature drops below 110 , the power supply resumes operation. during otp, the lower threshold of the v cc uvlo drops from 8v to 5.5v free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 12 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. leading edge blanking (leb) in normal operation, the primary peak current is sensed by a shunt resistor between the source pin and ground. the turn-off threshold of the mosfet is set by fb voltage, vsense=v fb /3.3. when the voltage drop of shunt resistor reaches vsense, the mosfet turns off. during start-up and over-load condition, the primary peak current threshold is internally limited to 1v even if v fb voltage is larger than 3.3v to avoid excessive output power and lower the voltage rating of the switch. in order to avoid turning off the mosfet by mis- trigger spikes shortly after the switch turns on, the ic implements a 320ns leading edge blanking. during blanking time, any trigger signal on source pin is blocked. figure 11 shows the primary current sense waveform and the leading edge blanking. figure 11?leading edge blanking free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 13 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. start vcc>11.8v vcc<8.5v? and olp=logic high internal high voltage current source on toff< 7.8us y n soft start monitor v fb monitor vcc v fb >3.7v 0.5v0 . 7v y n n y olp=logic high y thermal monitor y vcc decrease to 5.5v shut down internal high voltage current source latch off the switching pulse n continuous fault monitor vcc<8v y n ovp = logic high? n y otp= logic high? y n uvlo, otp & olp are auto restart, ovp is latch release from the latch condition , need to unplug from the main input . pin demag monitor vcc<3v? y n shut off the switching pulse y figure 12?control flow chart free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 14 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. 11.8v 8v 5.5v vcc driver ifault flag ovp fault occurs here driver pluses regulation occurs here high voltage current source start up normal operation normal operation normal operation olp fault occurs here on off over voltage occurs here normal operation otp fault occurs here normal operation unplug from main input normal operation normal operation figure 13?evolution of the signal in presence of a fault free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 15 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. package information pdip8-7 note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length and width do no t include mold flash, or protrusions. 3) jedec reference is ms-001. 4) drawing is not to scale. 0.008(0.20) 0.014(0.36) 0.240(6.10) 0.260(6.60) pin 1 id 0.050(1.27) 0.065(1.65) 0.367(9.32) 0.387(9.83) top view front view side view 1 4 85 0.300(7.62) 0.325(8.26) 0.320( 8.13) 0.400(10.16) 0.125(3.18) 0.145(3.68) 0.120(3.05) 0.140(3.56) 0.015(0.38) 0.021(0.53) 0.100(2.54) bsc 0.015(0.38) 0.035(0.89) free datasheet http://www.ndatasheet.com
hf01b00/01/02/03/04?off line high vo ltage quasi resonant regulator notice: the information in this document is subject to change wi thout notice. please contact m ps for current specifications. users should warrant and guarantee that third party intellectual property rights ar e not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. hf01b00/01/02/03/04 rev. 1.11 www.monolithicpower.com 16 7/4/2011 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. soic7 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o see detail "a" 0.0075(0.19) 0.0098(0.25) 0.150(3.80) 0.157(4.00) pin 1 id 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.004(0.10) 0.010(0.25) 0.189(4.80) 0.197(5.00) 0.053(1.35) 0.069(1.75) top view front view 0.228(5.80) 0.244(6.20) side view 14 85 recommended land pattern 0.213(5.40) 0.063(1.60) 0.050(1.27) 0.024(0.61) note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming) shall be 0.004" inches max. 5) jedec reference is ms-012. 6) drawing is not to scale. 0.010(0.25) bsc gauge plane free datasheet http://www.ndatasheet.com

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